Semiconductors play an important role in developing these cutting-edge diagnostic imaging systems. With increases in density, flexibility and performance, today's programmable logic provides the system-on-a-chip (SOC) capabilities to drive next-generation imaging systems.

As shown in Figure 1, a typical diagnostic imaging system consists of three sets of cards: data acquisition, data consolidation, and image/data processing cards. 

Figure 1: Example of Altera Solution for Diagnostic Imaging Equipment

The data acquisition card, which filters incoming data, is the most cost-sensitive system card. Usually a diagnostic imaging system will consist of multiple data acquisition cards (in some cases, up to 20 cards per system). Once the data is compensated and filtered, it is sent to the data consolidation card for buffering and data alignment. For CT and PET scanners where the detectors rotate around the body, the data is serialized and sent across a slip ring electromechanical subassembly. Once the data has been collected, it is sent to the image/data processing cards. These cards perform heavy-duty filtering and the most algorithm-intensive image reconstruction. Once completed the final imaging and scaling functions for display are usually done on a single board computer (SBC). There are several variables that you need to consider before making component selections for the acquisition and processing cards. For example, depending on the number of channels per system and resolution required, you could choose:

• Off-the-shelf analog components or integrate the analog functionality into an ASIC
• Two-dimensional (2D) or three-dimensional (3D) imaging
• To partition image processing between the processing cards and the SBC

Feature-Rich Programmable Solutions for Image Processing

Altera^® FPGAs provide favorable solutions to designers of diagnostic imaging equipment. For cost-sensitive data acquisition cards, Cyclone^® II and Cyclone III devices, which now offer abundant digital signal processing (DSP) blocks plus the lowest price per logic element (LE) compared to all other cost-optimized FPGA families, are excellent candidates.

The Stratix^® II, Stratix, Stratix GX , Stratix II GX, and HardCopy^® families are ideal for data consolidation and image processing cards. These families give system designers flexibility, performance, integration, and design resources not available elsewhere. The Stratix II device family uses a high-performance architecture that accelerates block-based designs for maximum system performance. They include high-performance DSP blocks (up to 384 18x18 multipliers), up to 10 Mbits of embedded TriMatrix memory, up to 180,000 logic elements (LEs), and flexible I/O standards. Stratix II devices can interface with external memory such as DDR2, RLDRAM II, FCRAM, QDRII, DDR, QDR, and SRAM. Stratix GX and Stratix II GX devices also feature multigigabit (from 1.25 to 6 Gbps) serial transceiver technology necessary to transport high-speed data across slip rings and backplanes. For additional cost reduction and a rapid alternative to traditional ASICs, Altera offers HardCopy devices, the industry’s first ASICs with a seamless FPGA migration path.

The feature-rich Nios^® II embeded processor affords unprecedented flexibility and performance at an incredibly low price. Nios II processors can be used in place of a host microcontroller for motor control functions on auxiliary cards. Using Stratix, Stratix II, Stratix GX, Stratix II GX, Cyclone II, or Cyclone III devices on image processing cards, an embedded Nios II CPU coupled with DSP blocks as co-processors can replace one or more digital signal processors for significant cost reductions.

Altera also offers an extensive set of related intellectual property, development kits and reference designs for diagnostic imaging functions. Visit the links below to get started on your next design. See Table 1.

Additional Solutions

• Design Software
• Training
• Design Services
• Altera Megafunction Partner Program (AMPP^SM)